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Single-Supply, Rail-to-Rail, Low Power FET-Input Op Amp AD820
FEATURES
True single-supply operation Output swings rail-to-rail Input voltage range extends below ground Single-supply capability from 5 V to 36 V Dual-supply capability from 2.5 V to 18 V Excellent load drive Capacitive load drive up to 350 pF Minimum output current of 15 mA Excellent ac performance for low power 800 A maximum quiescent current Unity gain bandwidth: 1.8 MHz Slew rate of 3.0 V/s Excellent dc performance 800 V maximum input offset voltage 1 V/C typical offset voltage drift 25 pA maximum input bias current Low noise 13 nV/Hz @ 10 kHz
PIN CONFIGURATIONS
NULL 1 -IN 2 +IN 3 -VS 4
AD820
8 7 6
NC +VS VOUT NULL
00873-001
TOP VIEW (Not to Scale)
5
NC = NO CONNECT
Figure 1. 8-Lead PDIP
NC 1 -IN 2 +IN 3 -VS 4
AD820
8 7 6
NC +VS VOUT NC
00873-002
TOP VIEW (Not to Scale)
5
NC = NO CONNECT
Figure 2. 8-Lead SOIC
APPLICATIONS
Battery-powered precision instrumentation Photodiode preamps Active filters 12- to 14-bit data acquisition systems Medical instrumentation Low power references and regulators
GENERAL DESCRIPTION
The AD820 is a precision, low power FET input op amp that can operate from a single supply of 5.0 V to 36 V, or dual supplies of 2.5 V to 18 V. It has true single-supply capability, with an input voltage range extending below the negative rail, allowing the AD820 to accommodate input signals below ground in the single-supply mode. Output voltage swing extends to within 10 mV of each rail, providing the maximum output dynamic range. Offset voltage of 800 V maximum, offset voltage drift of 1 V/C, typical input bias currents below 25 pA, and low input voltage noise provide dc precision with source impedances up to 1 G. 1.8 MHz unity gain bandwidth, -93 dB THD at 10 kHz, and 3 V/s slew rate are provided for a low supply current of 800 A. The AD820 drives up to 350 pF of direct capacitive load and provides a minimum output current of 15 mA. This allows the amplifier to handle a wide range of load conditions. This combination of ac and dc performance, plus the outstanding load drive capability, results in an exceptionally versatile amplifier for the single-supply user.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The AD820 is available in two performance grades. The A and B grades are rated over the industrial temperature range of -40C to +85C. The AD820 is offered in two 8-lead package options: plastic DIP (PDIP) and surface mount (SOIC).
1V
100 90
1V
20s
10 0%
1V
Figure 3. Gain of 2 Amplifier; VS = 5 V, 0 V, VIN = 2.5 V Sine Centered at 1.25 V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)1996-2007 Analog Devices, Inc. All rights reserved.
00873-004
AD820 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 9 ESD Caution.................................................................................. 9 Typical Performance Characteristics ........................................... 10 Application Notes ........................................................................... 16 Input Characteristics.................................................................. 16 Output Characteristics............................................................... 17 Offset Voltage Adjustment ............................................................ 18 Applications..................................................................................... 19 Single Supply Half-Wave and Full-Wave Rectifiers............... 19 4.5 V Low Dropout, Low Power Reference............................. 19 Low Power 3-Pole Sallen Key Low-Pass Filter ....................... 20 Outline Dimensions ....................................................................... 21 Ordering Guide .......................................................................... 22
REVISION HISTORY
2/07--Rev. D to Rev. E Updated Format..................................................................Universal Updated Outline Dimensions ....................................................... 21 Changes to the Ordering Guide.................................................... 22 5/02--Rev. C to Rev. D Change to SOIC Package (R-8) Drawing .................................... 15 Edits to Features................................................................................ 1 Edits to Product Description .......................................................... 1 Delete Specifications for AD820A-3 V .......................................... 5 Edits to Ordering Guide .................................................................. 6 Edits to Typical Performance Characteristics............................... 8
Rev. E | Page 2 of 24
AD820 SPECIFICATIONS
VS = 0 V, 5 V @ TA = 25C, VCM = 0 V, VOUT = 0.2 V, unless otherwise noted. Table 1.
Parameter DC PERFORMANCE Initial Offset Maximum Offset over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX TMIN to TMAX TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% INPUT CHARACTERISTICS Common-Mode Voltage Range 1 TMIN to TMAX CMRR TMIN to TMAX Input Impedance Differential Common Mode Conditions Min AD820A Typ Max 0.1 0.5 2 2 0.5 2 0.5 400 400 80 80 15 10 1000 150 30 0.8 1.2 25 5 20 Min AD820B Typ 0.1 0.5 2 2 0.5 2 0.5 500 400 80 80 15 10 1000 150 30 Max 0.4 0.9 10 2.5 10 Unit mV mV V/C pA nA pA nA V/mV V/mV V/mV V/mV V/mV V/mV
VCM = 0 V to 4 V
VOUT = 0.2 V to 4 V RL = 100 k RL = 10 k RL = 1 k
2 25 21 16 13 18 0.8 RL = 10 k to 2.5 V VOUT = 0.25 V to 4.75 V -93 1.8 210 3 1.4 1.8 -0.2 -0.2 66 66 +4 +4 80 -0.2 -0.2 72 66
2 25 21 16 13 18 0.8 -93 1.8 210 3 1.4 1.8 +4 +4 80
V p-p nV/Hz nV/Hz nV/Hz nV/Hz fA p-p fA/Hz dB MHz kHz V/s s s V V dB dB ||pF ||pF
VOUT p-p = 4.5 V
VOUT = 0.2 V to 4.5 V
VCM = 0 V to 2 V
1013||0.5 1013||2.8
1013||0.5 1013||2.8
Rev. E | Page 3 of 24
AD820
Parameter OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX Operating Output Current TMIN to TMAX Short-Circuit Current Capacitive Load Drive POWER SUPPLY Quiescent Current Power Supply Rejection TMIN to TMAX
1
Conditions
Min
AD820A Typ Max
Min
AD820B Typ
Max
Unit
ISINK = 20 A ISOURCE = 20 A ISINK = 2 mA ISOURCE = 2 mA ISINK = 15 mA ISOURCE = 15 mA 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900
25 350 TMIN to TMAX VS+ = 5 V to 15 V 620 80 800 66 66
25 350 620 80 800
mV mV mV mV mV mV mV mV mV mV mV mV mA mA mA pF A dB dB
70 70
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+ VS - 1 V) to +VS. Common-mode error voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply. 2 VOL - VEE is defined as the difference between the lowest possible output voltage (VOL) and the minus voltage supply rail (VEE). VCC - VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. E | Page 4 of 24
AD820
VS = 5 V @ TA = 25C, VCM = 0 V, VOUT = 0 V, unless otherwise noted. Table 2.
Parameter DC PERFORMANCE Initial Offset Maximum Offset over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX RL = 10 k TMIN to TMAX RL = 1 k TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% INPUT CHARACTERISTICS Common-Mode Voltage Range 1 TMIN to TMAX CMRR TMIN to TMAX Input Impedance Differential Common Mode Conditions Min AD820A Typ 0.1 0.5 2 2 0.5 2 0.5 400 400 80 80 20 10 1000 150 30 Max 0.8 1.5 25 5 20 Min AD820B Typ 0.3 0.5 2 2 0.5 2 0.5 400 400 80 80 20 10 1000 150 30 Max 0.4 1 10 2.5 10 Unit mV mV V/C pA nA pA nA V/mV V/mV V/mV V/mV V/mV V/mV
VCM = -5 V to 4 V
VOUT = 4 V to -4 V RL = 100 k
2 25 21 16 13 18 0.8 RL = 10 k VOUT = 4.5 V -93 1.9 105 3 1.4 1.8 -5.2 -5.2 66 66 +4 +4 80 -5.2 -5.2 72 66
2 25 21 16 13 18 0.8 -93 1.8 105 3 1.4 1.8 +4 +4 80
V p-p nV/Hz nV/Hz nV/Hz nV/Hz fA p-p fA/Hz dB MHz kHz V/s s s V V dB dB ||pF ||pF
VOUT p-p = 9 V
VOUT = 0 V to 4.5 V
VCM = -5 V to +2 V
1013||0.5 1013||2.8
1013||0.5 1013||2.8
Rev. E | Page 5 of 24
AD820
Parameter OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX Operating Output Current TMIN to TMAX Short-Circuit Current Capacitive Load Drive POWER SUPPLY Quiescent Current Power Supply Rejection TMIN to TMAX
1
Conditions
Min
AD820A Typ
Max
Min
AD820B Typ
Max
Unit
ISINK = 20 A ISOURCE = 20 A ISINK = 2 mA ISOURCE = 2 mA ISINK = 15 mA ISOURCE = 15 mA 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900
30 350 TMIN to TMAX VS+ = 5 V to 15 V 650 80 800 70 70
30 350 620 80 800
mV mV mV mV mV mV mV mV mV mV mV mV mA mA mA pF A dB dB
70 70
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+ VS - 1 V) to +VS. Common-mode error voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply. 2 VOL - VEE is defined as the difference between the lowest possible output voltage (VOL) and the minus voltage supply rail (VEE). VCC - VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. E | Page 6 of 24
AD820
VS = 15 V @ TA = 25C, VCM = 0 V, VOUT = 0 V, unless otherwise noted. Table 3.
Parameter DC PERFORMANCE Initial Offset Maximum Offset over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX RL = 10 k TMIN to TMAX RL = 1 k TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% INPUT CHARACTERISTICS Common-Mode Voltage Range 1 TMIN to TMAX CMRR TMIN to TMAX Input Impedance Differential Common Mode Conditions Min AD820A Typ 0.4 0.5 2 2 40 0.5 2 0.5 500 500 100 100 30 20 2000 500 45 Max 2 3 25 5 20 Min AD820B Typ 0.3 0.5 2 2 40 0.5 2 0.5 500 500 100 100 30 20 2000 500 45 Max 1.0 2 10 2.5 10 Unit mV mV V/C pA pA nA pA nA V/mV V/mV V/mV V/mV V/mV V/mV
VCM = 0 V VCM = -10 V VCM = 0 V
VOUT = +10 V to -10 V RL = 100 k
2 25 21 16 13 18 0.8 RL = 10 k VOUT = 10 V -85 1.9 45 3 4.1 4.5 -15.2 -15.2 70 70 +14 +14 80 -15.2 -15.2 74 74
2 25 21 16 13 18 0.8 -85 1.9 45 3 4.1 4.5 +14 +14 90
V p-p nV/Hz nV/Hz nV/Hz nV/Hz fA p-p fA/Hz dB MHz kHz V/s s s V V dB dB ||pF ||pF
VOUT p-p = 20 V
VOUT = 0 V to 10 V
VCM = -15 V to +12 V
1013||0.5 1013||2.8
1013||0.5 1013||2.8
Rev. E | Page 7 of 24
AD820
Parameter OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX Operating Output Current TMIN to TMAX Short-Circuit Current Capacitive Load Drive POWER SUPPLY Quiescent Current Power Supply Rejection TMIN to TMAX
1
Conditions
Min
AD820A Typ
Max
Min
AD820B Typ
Max
Unit
ISINK = 20 A ISOURCE = 20 A ISINK = 2 mA ISOURCE = 2 mA ISINK = 15 mA ISOURCE = 15 mA 20 15
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900 20 15
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900
45 350 TMIN to TMAX VS+ = 5 V to 15 V 700 80 900 70 70
45 350 700 80 900
mV mV mV mV mV mV mV mV mV mV mV mV mA mA mA
70 70
A dB dB
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+ VS - 1 V) to +VS. Common-mode error voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply. 2 VOL - VEE is defined as the difference between the lowest possible output voltage (VOL) and the minus voltage supply rail (VEE). VCC - VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. E | Page 8 of 24
AD820 ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Supply Voltage Internal Power Dissipation1 Plastic DIP (N) SOIC (R) Input Voltage Output Short-Circuit Duration Differential Input Voltage Storage Temperature Range N R Operating Temperature Range AD820A/B Lead Temperature (Soldering 60 sec)
1
Rating 18 V 1.6 W 1.0 W (+VS + 0.2 V) to -(20 V + VS) Indefinite 30 V -65C to +125C -65C to +150C -40C to +85C 260C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
8-lead plastic DIP package: JA = 90C/W 8-lead SOIC package: JA = 160C/W
Rev. E | Page 9 of 24
AD820 TYPICAL PERFORMANCE CHARACTERISTICS
50 VS = 0V, 5V 40
INPUT BIAS CURRENT (pA) NUMBER OF UNITS
5
30
0 VS = 0V, +5V AND 5V VS = 5V
20
10
00873-005 00873-008
0 -0.5
-0.4 -0.3 -0.2 -0.1
0
0.1
0.2
0.3
0.4
0.5
-5 -5
-4
-3
-2
-1
0
1
2
3
4
5
OFFSET VOLTAGE (mV)
COMMON-MODE VOLTAGE (V)
Figure 4. Typical Distribution of Offset Voltage (248 Units)
Figure 7. Input Bias Current vs. Common-Mode Voltage; VS = +5 V, 0 V and VS = 5 V
1k
48 VS = 5V 40 VS = 15V
INPUT BIAS CURRENT (pA)
00873-006
100
32
% IN BIN
24
10
16
1
00873-009
8
0 -10
-8
-6
-4
-2
0
2
4
6
8
10
0.1 -16
-12
-8
-4
0
4
8
12
16
OFFSET VOLTAGE DRIFT (V/C)
COMMON-MODE VOLTAGE (V)
Figure 5. Typical Distribution of Offset Voltage Drift (120 Units)
Figure 8. Input Bias Current vs. Common-Mode Voltage; VS = 15 V
100k 50 45 40
NUMBER OF UNITS INPUT BIAS CURRENT (pA)
10k
35 30 25 20 15 10 5 0 0 1 2 3 4 5 6 7 8 9 10
00873-007
1k
100
10
1
00873-010
0.1 20
40
60
80
100
120
140
TEMPERATURE (C)
INPUT BIAS CURRENT (pA)
Figure 6. Typical Distribution of Input Bias Current (213 Units)
Figure 9. Input Bias Current vs. Temperature; VS = 5 V, VCM = 0 V
Rev. E | Page 10 of 24
AD820
10M 40 POSITIVE RAIL
OPEN-LOOP GAIN (V/V)
20
INPUT VOLTAGE (V)
RL = 2k RL = 20k NEGATIVE RAIL
1M
VS = 15V
VS = 0V, +5V 100k
0
POSITIVE RAIL
-20
00873-011
POSITIVE RAIL
NEGATIVE RAIL
00873-014 00873-016 00873-015
RL = 100k -40 0 60 120 180
10k 100
NEGATIVE RAIL 240
1k
10k
100k
300
LOAD RESISTANCE ()
OUTPUT VOLTAGE FROM RAILS (mV)
Figure 10. Open-Loop Gain vs. Load Resistance
Figure 13. Input Error Voltage vs. Output Voltage within 300 mV of Either Supply Rail for Various Resistive Loads; VS = 5 V
1k
10M
OPEN-LOOP GAIN (V/V)
1M
RL = 100k
VS = 15V VS = 0V, +5V VS = 15V VS = 0V, +5V
INPUT VOLTAGE NOISE (nV/Hz)
00873-012
100
RL = 10k 100k
10
VS = 15V RL = 600 VS = 0V, +5V 10k -60 -40 -20 0 20 40 60 80 100 120
140
1
1
10
100 FREQUENCY (Hz)
1k
10k
TEMPERATURE (C)
Figure 11. Open-Loop Gain vs. Temperature
Figure 14. Input Voltage Noise vs. Frequency
300
-40 -50 -60 RL = 10k ACL = -1
200
INPUT VOLTAGE (V)
100
RL = 10k
0
THD (dB)
RL = 100k
-70 -80 -90
-100
VS = 15V; VOUT = 20V p-p VS = 5V; VOUT = 9V p-p VS = 0V, +5V; VOUT = 4.5V p-p
-200
RL = 600
00873-013
-100 -110 100
-300 -16
-12
-8
-4
0
4
8
12
16
1k
10k FREQUENCY (Hz)
100k
OUTPUT VOLTAGE (V)
Figure 12. Input Error Voltage vs. Output Voltage for Resistive Loads
Figure 15. Total Harmonic Distortion vs. Frequency
Rev. E | Page 11 of 24
AD820
100 100 100 90
COMMON-MODE REJECTION (dB)
80 PHASE
80
PHASE MARGIN (DEGREES)
80 70 60 50 40 30 20 10
00873-020
OPEN-LOOP GAIN (dB)
60 GAIN 40
60
VS = 0V, +5V
VS = 15V
40
20
20
0 RL = 2k CL = 100pF 100 1k 10k 100k 1M
0
00873-017
-20 10
-20 10M
0 10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 16. Open-Loop Gain and Phase Margin vs. Frequency
Figure 19. Common-Mode Rejection vs. Frequency
1k
5
100
COMMON-MODE ERROR VOLTAGE (mV)
ACL = +1 VS = 15V
4
OUTPUT IMPEDANCE ()
10
3
NEGATIVE RAIL
POSITIVE RAIL
1
2 +25C 1 -55C 0 -1 0 +125C -55C 1 2 3 +125C
00873-021
0.1
00873-018
0.01 100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
COMMON-MODE VOLTAGE FROM SUPPLY RAILS (V)
Figure 17. Output Impedance vs. Frequency
Figure 20. Absolute Common-Mode Error vs. Common-Mode Voltage from Supply Rails (VS - VCM)
1k
16
8 4 0 -4 -8 -12 -16
1%
OUTPUT SATURATION VOLTAGE (mV)
12
OUTPUT SWING FROM 0 TO V
100 VS - VOH VOL - VS
0.1%
0.01%
ERROR
10
1%
00873-019
0
1
2
3
4
5
1 0.001
0.01
0.1
1
10
100
SETTLING TIME (s)
LOAD CURRENT (mA)
Figure 18. Output Swing and Error vs. Settling Time
Figure 21. Output Saturation Voltage vs. Load Current
Rev. E | Page 12 of 24
00873-022
AD820
1k ISOURCE = 10mA 120 110
OUTPUT SATURATION VOLTAGE (mV)
ISINK = 10mA 100 ISOURCE = 1mA ISINK = 1mA ISOURCE = 10A 10 ISINK = 10A
POWER SUPPLY REJECTION (dB)
100 90 80 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1M
00873-026
+PSRR -PSRR
1 -60
-40
-20
0
20
40
60
80
100
120
140
00873-023
10M
TEMPERATURE (C)
FREQUENCY (Hz)
Figure 22. Output Saturation Voltage vs. Temperature
Figure 25. Power Supply Rejection vs. Frequency
80
30 R1 = 2k
SHORT CIRCUIT CURRENT LIMIT (mA)
70 60 50 40 VS = 0V, +5V 30 20 10 0 -60 VS = 0V, +5V VS = 15V
25
OUTPUT VOLTAGE (V)
20
-OUT VS = 15V + -
VS = 15V
15
10 VS = 0V, +5V
00873-027
+
00873-024
5
-40
-20
0
20
40
60
80
100
120
140
0 10k
100k FREQUENCY (Hz)
1M
10M
TEMPERATURE (C)
Figure 23. Short Circuit Current Limit vs. Temperature
Figure 26. Large Signal Frequency Response
800 700
T = +125C T = +25C
QUIESCENT CURRENT (A)
600 T = -55C 500 400 300 200
00873-025
100 0
0
4
8
12
16
20
24
28
32
36
TOTAL SUPPLY VOLTAGE (V)
Figure 24. Quiescent Current vs. Supply Voltage over Different Temperatures
Rev. E | Page 13 of 24
AD820
5V
+VS 0.01F + VIN - 2 3 7 -
100 90
5s
AD820
+ 4
6 0.01F RL 100pF
+ VOUT -
00873-028
-VS
10 0%
00873-031
Figure 27. Unity-Gain Follower, Used for Figure 28 Through Figure 32
Figure 30. Large Signal Response Unity-Gain Follower; VS = 15 V, RL = 10 k
5V
100 90
10s
100 90
10mV
500ns
10 0%
00873-029
10 0%
00873-032
Figure 28. 20 V, 25 kHz Sine Input; Unity-Gain Follower; RL = 600 , VS = 15 V
Figure 31. Small Signal Response Unity-Gain Follower; VS = 15 V, RL = 10 k
1V
100 90
2s
100 90
1V
2s
10
10
GND 0%
00873-030
GND 0%
00873-033
Figure 29. VS = 5 V, 0 V; Unity-Gain Follower Response to 0 V to 4 V Step
Figure 32. VS = 5 V, 0 V; Unity-Gain Follower Response to 0 V to 5 V Step
Rev. E | Page 14 of 24
AD820
+VS 0.01F + VIN 3 2 7
10k VIN
20k +VS 0.01F
+ VOUT -
AD820
- 4
6 RL 100pF
+ VOUT -
00873-034
2 3
- +
7 6
00873-035 00873-038 00873-036
AD820
4
RL
100pF
Figure 33. Unity-Gain Follower, Used for Figure 34
Figure 35. Gain of Two Inverter, Used for Figure 36 and Figure 37
10mV
100 90
2s
100 90
1V
2S
10
10
GND 0%
00873-037
GND 0%
Figure 34. VS = 5 V, 0 V; Unity-Gain Follower Response to 40 mV Step Centered 40 mV Above Ground
Figure 36. VS = 5 V, 0 V; Gain of Two Inverter Response to 2.5 V Step, Centered -1.25 V Below Ground
10mV
100 90
2s
10
GND 0%
Figure 37. VS = 5 V, 0 V; Gain of Two Inverter Response to 20 mV Step, Centered 20 mV Below Ground
Rev. E | Page 15 of 24
AD820 APPLICATION NOTES
INPUT CHARACTERISTICS
In the AD820, n-channel JFETs are used to provide a low offset, low noise, high impedance input stage. Minimum input commonmode voltage extends from 0.2 V below -VS to 1 V less than +VS. Driving the input voltage closer to the positive rail causes a loss of amplifier bandwidth (as can be seen by comparing the large signal responses shown in Figure 29 and Figure 32) and increased common-mode voltage error, as illustrated in Figure 20. The AD820 does not exhibit phase reversal for input voltages up to and including +VS. Figure 38a shows the response of an AD820 voltage follower to a 0 V to 5 V (+VS) square wave input. The input and output are superimposed. The output polarity tracks the input polarity up to +VS with no phase reversal. The reduced bandwidth above a 4 V input causes the rounding of the output wave form. For input voltages greater than +VS, a resistor in series with the AD820's positive input prevents phase reversal, at the expense of greater input voltage noise. This is illustrated in Figure 38b. Since the input stage uses n-channel JFETs, input current during normal operation is negative; the current flows out from the input terminals. If the input voltage is driven more positive than +VS - 0.4 V, the input current reverses direction as internal device junctions become forward biased. This is illustrated in Figure 7. A current-limiting resistor should be used in series with the input of the AD820 if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV, or if an input voltage is applied to the AD820 when VS = 0. The amplifier will be damaged if left in that condition for more than 10 seconds. A 1 k resistor allows the amplifier to withstand up to 10 V of continuous overvoltage, and increases the input voltage noise by a negligible amount. Input voltages less than -VS are a completely different story. The amplifier can safely withstand input voltages 20 V below the negative supply voltage as long as the total voltage from the positive supply to the input terminal is less than 36 V. In addition, the input stage typically maintains picoamp level input currents across that input voltage range. The AD820 is designed for 13 nV/Hz wideband input voltage noise and maintains low noise performance to low frequencies (refer to Figure 14). This noise performance, along with the AD820's low input current and current noise means that the AD820 contributes negligible noise for applications with source resistances greater than 10 k and signal bandwidths greater than 1 kHz. This is illustrated in Figure 39.
INPUT VOLTAGE NOISE (V rms)
1V
100 90
2s
10
GND 0% 1V
(a)
1V
100
1V
10s
+VS
90
10
GND 0% 1V
(b) 5V + + VIN - RP
AD820
-
Figure 38. (a) Response with RP = 0 ; VIN from 0 V to +VS (b) VIN = 0 V to +VS + 200 mV, VOUT = 0 V to +VS, RP = 49.9 k
100k WHENEVER JOHNSON NOISE IS GREATER THAN AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE CONSIDERED NEGLIGIBLE FOR APPLICATION. 1kHz 1k RESISTOR JOHNSON NOISE 100
10k
10 10Hz 1
00873-040
AMPLIFIER-GENERATED NOISE 0.1 10k 100k 1M 10M 100M 1G
10G
SOURCE IMPEDANCE ()
Figure 39. Total Noise vs. Source Impedance
Rev. E | Page 16 of 24
00873-039
+ VOUT -
AD820
OUTPUT CHARACTERISTICS
The AD820's unique bipolar rail-to-rail output stage swings within 5 mV of the negative supply and 10 mV of the positive supply with no external resistive load. The AD820's approximate output saturation resistance is 40 sourcing and 20 sinking. This can be used to estimate output saturation voltage when driving heavier current loads. For instance, when sourcing 5 mA, the saturation voltage to the positive supply rail is 200 mV; when sinking 5 mA, the saturation voltage to the negative rail is 100 mV. The amplifier's open-loop gain characteristic changes as a function of resistive load, as shown in Figure 10 through Figure 13. For load resistances over 20 k, the AD820 input error voltage is virtually unchanged until the output voltage is driven to 180 mV of either supply. If the AD820 output is driven hard against the output saturation voltage, it recovers within 2 s of the input returning to the amplifier's linear operating region. Direct capacitive load interacts with the amplifier's effective output impedance to form an additional pole in the amplifier's feedback loop, which can cause excessive peaking on the pulse response or loss of stability. Worst case occurs when the amplifier is used as a unity-gain follower. Figure 40 shows AD820 pulse response as a unity-gain follower driving 350 pF. This amount of overshoot indicates approximately 20 degrees of phase margin--the system is stable, but is nearing the edge. Configurations with less loop gain, and as a result less loop bandwidth, are much less sensitive to capacitance load effects. Figure 41 is a plot of noise gain vs. the capacitive load that results in a 20 degree phase margin for the AD820. Noise gain is the inverse of the feedback attenuation factor provided by the feedback network in use.
20mV
100 90
5
4
PI ) PF NOISE GAIN (1+
3
2
1 300
1k
3k
10k
30k
CAPACITIVE LOAD FOR 20 PHASE MARGIN (pF)
Figure 41. Noise Gain vs. Capacitive Load Tolerance
Figure 42 shows a possible configuration for extending capacitance load drive capability for a unity-gain follower. With these component values, the circuit drives 5000 pF with a 10% overshoot.
+VS 0.01F + VIN - 2 3 7 - 100
AD820
+ 4
6 0.01F
+ VOUT -
-VS
20pF 20k
00873-043
2S
Figure 42. Extending Unity-Gain Follower Capacitive Load Capability Beyond 350 pF
10 0%
00873-041
Figure 40. Small Signal Response of AD820 as Unity-Gain Follower Driving 350 pF Capacitive Load
Rev. E | Page 17 of 24
00873-042
RI
+ - RF
AD820 OFFSET VOLTAGE ADJUSTMENT
+ +VS 3 7 6
4 -VS
00873-044
Figure 43. Offset Null
Rev. E | Page 18 of 24
-
The offset voltage of the AD820 is low, so external offset voltage nulling is not usually required. Figure 43 shows the recommended technique for AD820 packaged in plastic DIP. Adjusting offset voltage in this manner changes the offset voltage temperature drift by 4 V/C for every millivolt of induced offset. The null pins are not functional for AD820s in the 8-lead SOIC package.
AD820
2
1 5 20k
AD820 APPLICATIONS
SINGLE SUPPLY HALF-WAVE AND FULL-WAVE RECTIFIERS
An AD820 configured as a unity-gain follower and operated with a single supply can be used as a simple half-wave rectifier. The AD820 inputs maintain picoamp level input currents even when driven well below the negative supply. The rectifier puts that behavior to good use, maintaining an input impedance of over 1011 for input voltages from 1 V from the positive supply to 20 V below the negative supply. The full- and half-wave rectifier shown in Figure 44 operates as follows: when VIN is above ground, R1 is bootstrapped through the unity-gain follower, A1, and the loop of amplifier A2. This forces the inputs of A2 to be equal; thus, no current flows through R1 or R2, and the circuit output tracks the input. When VIN is below ground, the output of A1 is forced to ground. The noninverting input of amplifier A2 sees the ground level output of A1; therefore, A2 operates as a unity-gain inverter. The output at Node C is then a full-wave rectified version of the input. Node B is a buffered half-wave rectified version of the input. Input voltages up to 18 V can be rectified, depending on the voltage supply used.
R1 100k +VS + +VS 0.01F 0.01F + 3 2 7 A1 - 4 6 2 3 7 A2 - 4 6 +C FULL-WAVE RECTIFIED OUPUT - R2 100k
4.5 V LOW DROPOUT, LOW POWER REFERENCE
The rail-to-rail performance of the AD820 can be used to provide low dropout performance for low power reference circuits powered with a single low voltage supply. Figure 45 shows a 4.5 V reference using the AD820 and the AD680, a low power 2.5 V band gap reference. R2 and R3 set up the required gain of 1.8 to develop the 4.5 V output. R1 and C2 form a lowpass RC filter to reduce the noise contribution of the AD680.
2.5V OUTPUT
5V
U2 AD820
7 2 + 6 2.5V 10mV R1 100k 3
6 4 - 2 R2 90k (20k)
4.5V OUTPUT
3
U1 AD680
4
C3 10F/25V R3 100k (25k) REF COMMON
Figure 45. Single Supply 4.5 V Low Dropout Reference
A
+ VIN -
With a 1 mA load, this reference maintains the 4.5 V output with a supply voltage down to 4.7 V. The amplitude of the recovery transient for a 1 mA to 10 mA step change in load current is under 20 mV, and settles out in a few microseconds. Output voltage noise is less than 10 V rms in a 25 kHz noise bandwidth.
AD820
AD820
+
B
HALF-WAVE RECTIFIED OUPUT -
A 100
90
B
C
10 0%
00873-045
Figure 44. Single-Supply Half- and Full-Wave Rectifier
Rev. E | Page 19 of 24
00873-046
C1 0.1F
C2 0.1F FILM
AD820
LOW POWER 3-POLE SALLEN KEY LOW-PASS FILTER
The high input impedance of the AD820 makes it a good selection for active filters. High value resistors can be used to construct low frequency filters with capacitors much less than 1 F. The AD820 picoamp level input currents contribute minimal dc errors. Figure 46 shows an example, a 10 Hz 3-pole Sallen Key filter. The high value used for R1 minimizes interaction with signal source resistance. Pole placement in this version of the filter minimizes the Q associated with the 2-pole section of the filter. This eliminates any peaking of the noise contribution of resistors R1, R2, and R3, thus minimizing the inherent output voltage noise of the filter.
+ VIN - R1 243k R2 243k C1 0.022F R3 243k C2 0.022F +VS 0.01F 3 C3 0.022F 2 7 +
AD820
- 4
6 0.01F
+ VOUT -
-VS
0 -10
FILTER GAIN RESPONCE (dB)
-20 -30 -40 -50 -60 -70 -80 -90 -100 0.1 1 10 FREQUENCY (Hz) 100 1k
00873-047
Figure 46. 10 Hz Sallen Key Low-Pass Filter
Rev. E | Page 20 of 24
AD820 OUTLINE DIMENSIONS
0.400 (10.16) 0.365 (9.27) 0.355 (9.02)
8 1 5
4
0.280 (7.11) 0.250 (6.35) 0.240 (6.10)
0.100 (2.54) BSC 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14)
0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92)
0.015 (0.38) MIN SEATING PLANE 0.005 (0.13) MIN
0.015 (0.38) GAUGE PLANE 0.430 (10.92) MAX
0.014 (0.36) 0.010 (0.25) 0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 47. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters)
5.00 (0.1968) 4.80 (0.1890)
4.00 (0.1574) 3.80 (0.1497)
8 1
5 4
6.20 (0.2440) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
0.51 (0.0201) 0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 48. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
Rev. E | Page 21 of 24
060506-A
070606-A
AD820
ORDERING GUIDE
Model AD820AN AD820ANZ 1 AD820AR AD820AR-REEL AD820AR-REEL7 AD820ARZ1 AD820ARZ-REEL1 AD820ARZ-REEL71 AD820BR AD820BR-REEL AD820BR-REEL7 AD820BRZ1 AD820BRZ-REEL1 AD820BRZ-REEL71
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N
Package Option N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8
Z = Pb-free part.
Rev. E | Page 22 of 24
AD820 NOTES
Rev. E | Page 23 of 24
AD820 NOTES
(c)1996-2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00873-0-2/07(E)
Rev. E | Page 24 of 24

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